I/O Circuit Patents:
“Apparatus and Method for Dynamic On-Die Termination in an Open-Drain Bus Architecture System,” Inventors: Usman A. Mughal, Razi Uddin, Chee how Lim et al. Patent#: 6,411,122 Issued: 06/25/2002.
- This method saved up to 50% of dynamic power at the driver side of AGTL buffer. It was the first time Intel used this novel technique to save power for mobile CPUs while preserving signal integrity of the bus.
“Apparatus and Method to Provide a Single Reference Component for Multiple Circuit Compensation using Digital Impedance Code Shifting,” Inventors: Usman A. Mughal, et al, Patent#: 6,545,522, Issued: 04/08/2003.
- This method used a single package pin as reference for termination resistance, I/O slew rate, and pull-down resistance compensation. It saved Intel millions of dollars of package pin cost.
“Apparatus and Method to use a Single Reference Component in a Master-Slave Configuration for Multiple Circuit Compensation,” Inventors: Usman A, Mughal, Gregory Taylor, et al, Patent#: 6,535,047, Issued: 03/18/2003.
- This method used a single package pin as reference for compensating many circuits. The circuit technique used a master-slave configuration. It saved Intel millions of dollars of package pin cost.
“Circuit Compensation Technique,” Inventors: C.H. Lim and Usman A. Mughal, Patent#: 6,509,780, Issued: 01/21/2003.
- An intelligent compensation scheme that minimized glitches in the actual circuits that used compensation information. By removing these glitches, timing margin on the I/O improved thus allowing them to run faster.
“Apparatus and Method for Linear On-Die Termination in an Open Drain Bus Architecture System,” Inventors: Raghu Raman, Usman A. Mughal, et al, Patent#: 6,424,170, Issued: 07/23/2002.
- A novel termination circuit for I/Os that provided linear resistance in the operating range of 45-65 Ohms. The design also protected transistor oxide, thus its longevity, by reducing stress across gate-drain voltages.
“Apparatus and Method to use a Single Reference Component in a Master-Slave Configuration for Multiple Circuit Compensation,” Inventors: Usman A, Mughal, Gregory Taylor, et al, Patent#: 6,717,455, Issued: 04/06/2004.
- Using a single package pin as reference for termination resistance, multiple I/O driver circuits were compensated by using one compensated circuit as reference. Saved Intel millions of dollars of package pin cost.
“Apparatus and Method to Provide a Single Reference Component for Multiple Circuit Compensation using Digital Impedance Code Shifting,” Inventors: Usman A. Mughal, et al, Patent#: 6,756,810, Issued: 06/29/2004.
- By shifting compensation codes, impedances were changed for different I/O terminations. The method used the same reference resistor for uni-processor and dual-processor I/O termination resistance. Saved Intel money.
Platform Patent:
“Bus Termination Scheme for Flexible Uni-Processor and Dual Processor Platforms,” Inventors: V. Ramachandran, Usman A. Mughal, and Chee How Lim, Patent#: 6,522,165, Issued: 02/18/2003.
- A novel termination scheme using a single platform topology for Uni and Dual-processor systems thus saving an extra motherboard design. The design preserved system signal integrity of a Uni-processor system.
PLL and DLL Circuit Patents:
“Variable Lock Window for a Phase Locked Loop,” Inventors: K. L. Wong, Usman A. Mughal, et al. Patent#: 6,614,317 Issued: 09/02/2003.
- Solved the problem of losing PLL lock signal at low operating frequencies when jitter can be higher. The circuit generated a wide lock window at low frequency and a narrow lock window at high frequency.
“Variable Slope Adjustment Circuit for Digital Interpolators,” Inventors: Usman A. Mughal and Keng L. Wong. Patent#: 7,154,320: Issued: 12/27/2006.
- A novel circuit design technique to improve operation of digital phase blenders. The circuit adjusted the input slopes to the phase blender to generate uniformly spaced interpolated output signals. Vital for DLLs.
Thermal Management Circuit Patent:
“Accurate on-die temperature measurement using remote sensing,” Inventors: David Duarte, Usman A. Mughal, et al., Patent#: 7,512,514: Issued: 03/31/2009.
- Remote thermal sensing technique that improves sensing accuracy by calibrating errors generated by self-heating of the silicon. Vital for power management systems on CPUs.